Digital Circuits Counter Implementation Applications Online Exam Quiz
Digital Circuits Counter Implementation Applications GK Quiz. Question and Answers related to Digital Circuits Counter Implementation Applications. MCQ (Multiple Choice Questions with answers about Digital Circuits Counter Implementation Applications
A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay (tp(tot)) is ________
Options
A : 12 ms
B : 24 ns
C : 48 ns
D : 60 ns
What is the maximum delay that can occur if four flip-flops are connected as a ripple counter and each flip-flop has propagation delays of tPHL = 22 ns and tPLH = 15 ns?
Options
A : 15 ns
B : 22 ns
C : 60 ns
D : 88 ns
A 4-bit ripple counter consists of flip-flops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of ________
Options
A : 15 ns
B : 30 ns
C : 45 ns
D : 60 ns
A 4 bit modulo-16 ripple counter uses JK flip-flops. If the propagation delay of each flip-flop is 50 nsec, the maximum clock frequency that can be used is equal to __________
Options
A : 20 MHz
B : 10 MHz
C : 5 MHz
D : 4 MHz
Assume a 4-bit ripple counter has a failure in the second flip-flop such that it “locks up”. The third and fourth stages will __________
Options
A : Continue to count with correct outputs
B : Continue to count but have incorrect outputs
C : Stop counting
D : Turn into molten silicon
A ripple counter’s speed is limited by the propagation delay of __________
Options
A : Each flip-flop
B : All flip-flops and gates
C : The flip-flops only with gates
D : Only circuit gates
A ripple counter’s speed is limited by the propagation delay of ____________
Options
A : Each flip-flop
B : All flip-flops and gates
C : The flip-flops only with gates
D : Only circuit gates
The main drawback of a ripple counter is that __________
Options
A : It has a cumulative settling time
B : It has a distributive settling time
C : It has a productive settling time
D : It has an associative settling time
A glitch that appears on the decoded output of a ripple counter is often difficult to see on an oscilloscope because of __________
Options
A : It is a random event
B : It occurs less frequently than the normal decoded output
C : It is very fast
D : All of the Mentioned
As the number of flip flops are increased, the total propagation delay of __________
Options
A : Ripple counter increases but that of synchronous counter remains the same
B : Both ripple and synchronous counters increase
C : Both ripple and synchronous counters remain the same
D : Ripple counter remains the same but that of synchronous counter increases
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