Digital Circuits Shift Registers Online Exam Quiz

Digital Circuits Shift Registers GK Quiz. Question and Answers related to Digital Circuits Shift Registers. MCQ (Multiple Choice Questions with answers about Digital Circuits Shift Registers

A serial in/parallel out, 4-bit shift register initially contains all 1s. The data nibble 0111 is waiting to enter. After four clock pulses, the register contains ________

Options

A : 0000

B : 1111

C : 0111

D : 1000

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The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________

Options

A : 01110

B : 00001

C : 00101

D : 00110

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Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)

Options

A : 1100

B : 0011

C : 0000

D : 1111

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An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (td) of ________

Options

A : 16 us

B : 8 us

C : 4 us

D : 2 us

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Based on how binary information is entered or shifted out, shift registers are classified into _______ categories.

Options

A : 2

B : 3

C : 4

D : 5

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With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________

Options

A : 4 ?s

B : 40 ?s

C : 400 ?s

D : 40 ms

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What is meant by the parallel load of a shift register?

Options

A : All FFs are preset with data

B : Each FF is loaded with data, one at a time

C : Parallel shifting of data

D : All FFs are set with data

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The full form of SIPO is ___________

Options

A : Serial-in Parallel-out

B : Parallel-in Serial-out

C : Serial-in Serial-out

D : Serial-In Peripheral-Out

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A shift register that will accept a parallel input or a bidirectional serial load and internal shift features is called as?

Options

A : Tristate

B : End around

C : Universal

D : Conversion

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How can parallel data be taken out of a shift register simultaneously?

Options

A : Use the Q output of the first FF

B : Use the Q output of the last FF

C : Tie all of the Q outputs together

D : Use the Q output of each FF

View Answer

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