Sequential Logic Circuits - General Questions Online Exam Quiz

Sequential Logic Circuits - General Questions GK Quiz. Question and Answers related to Sequential Logic Circuits - General Questions. MCQ (Multiple Choice Questions with answers about Sequential Logic Circuits - General Questions

A ripple counter's speed is limited by the propagation delay of:

Options

A : each flip-flop

B : all flip-flops and gates

C : the flip-flops only with gates

D : only circuit gates

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To operate correctly, starting a ring counter requires:

Options

A : clearing all the flip-flops

B : presetting one flip-flop and clearing all the others

C : clearing one flip-flop and presetting all the others

D : presetting all the flip-flops

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What type of register would shift a complete binary number in one bit at a time and shift all the stored bits out one bit at a time?

Options

A : PIPO

B : SISO

C : SIPO

D : PISO

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Synchronous counters eliminate the delay problems encountered with asynchronous (ripple) counters because the:

Options

A : input clock pulses are applied only to the first and last stages

B : input clock pulses are applied only to the last stage

C : input clock pulses are not used to activate any of the counter stages

D : input clock pulses are applied simultaneously to each stage

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One of the major drawbacks to the use of asynchronous counters is that:

Options

A : low-frequency applications are limited because of internal propagation delays

B : high-frequency applications are limited because of internal propagation delays

C : Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications.

D : Asynchronous counters do not have propagation delays, which limits their use in high-frequency applications.

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Which type of device may be used to interface a parallel data format with external equipment's serial format?

Options

A : key matrix

B : UART

C : memory chip

D : serial-in, parallel-out

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When the output of a tri-state shift register is disabled, the output level is placed in a:

Options

A : float state

B : LOW state

C : high impedance state

D : float state and a high impedance state

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A comparison between ring and johnson counters indicates that:

Options

A : a ring counter has fewer flip-flops but requires more decoding circuitry

B : a ring counter has an inverted feedback path

C : a johnson counter has more flip-flops but less decoding circuitry

D : a johnson counter has an inverted feedback path

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A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?

Options

A : shift register sequencer

B : clock

C : johnson

D : binary

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What is meant by parallel-loading the register?

Options

A : Shifting the data in all flip-flops simultaneously

B : Loading data in two of the flip-flops

C : Loading data in all four flip-flops at the same time

D : Momentarily disabling the synchronous SET and RESET inputs

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